AT34C02B-10TU-1.7【PDF 12/21 页】IC EEPROM 2KBIT 400KHZ 8TSSOP

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Table 9. WP Connected to Vcc

WP Connected to Vcc

Permanent Write

Reversible Write

Protect Register

Protect Register

Acknowledgment

Command

1010

1010

Read

PSWP

Read

PSWP

Set PSWP

Set PSWP

Read

RSWP

Read

RSWP

Set RSWP

Set RSWP

Clear

RSWP

Clear

RSWP

R/W Bit

R

W

R

R

W

W

R

R

W

W

W

W

PSWP

X

X

Programmed

Not Programmed

Programmed

Not Programmed

X

X

X

X

Programmed

Not Programmed

RSWP

X

X

X

X

X

X

Programmed

Not Programmed

Programmed

Not Programmed

X

X

from Device

ACK

ACK

No ACK

ACK

No ACK

ACK

No ACK

ACK

No ACK

ACK

No ACK

ACK

Action from Device

Read array

Device Write Protect

STOP - Indicates permanent write protect register is

programmed

Read out data don't care. Indicates PSWP register is

not programmed

STOP - Indicates permanent write protect register is

programmed

Cannot program write protect registers

STOP - Indicates reversible write protect register is

programmed

Read out data don't care. Indicates RSWP register is

not programmed

STOP - Indicates reversible write protect register is

programmed

Cannot program write protect registers

STOP - Indicates permanent write protect register is

programmed

Cannot write to write protect registers

Read Operations

Read operations are initiated the same way as write operations with the exception that

the read/write select bit in the device address word is set to one. There are three read

operations: current address read, random address read and sequential read.

CURRENT ADDRESS READ: The internal data word address counter maintains the

last address accessed during the last read or write operation, incremented by one. This

address stays valid between operations as long as the chip power is maintained. The

address “roll over” during read is from the last byte of the last memory page to the first

byte of the first page.

Once the device address with the read/write select bit set to one is clocked in and

acknowledged by the EEPROM, the current address data word is serially clocked out.

To end the command, the microcontroller does not respond with an input zero but does

generate a following stop condition (see Figure 13 on page 14).

RANDOM READ: A random read requires a “dummy” byte write sequence to load in the

data word address. Once the device address word and data word address are clocked

in and acknowledged by the EEPROM, the microcontroller must generate another start

condition. The microcontroller now initiates a current address read by sending a device

address with the read/write select bit high. The EEPROM acknowledges the device

address and serially clocks out the data word. To end the command, the microcontroller

12

AT34C02B

3417E–SEEPR–1/07

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